AD1452
AD1452是一款高度集成的音频系统DSP（数字信号处理器）。
AD1452集成了带FPU的Xtensa-HIFI4音频DSP，包括带抽取滤波器的2通道D-MIC接口，带高性能ADC的2通道A-MIC，立体声高性能DAC。它集成了两个I2S/TDM兼容的音频接口，可支持32通道输入和32通道输出。它还集成了8通道的高性能ASRC，THD+N小于-140dB。AD1452是一款无MCU芯片，主MCU通过I2C/SPI从模式接口将DSP代码和配置寄存器加载到AD1452。在ChipSlave模式下，DSP可以根据MCU配置的RAM地址运行，在ChipMaster模式下，DSP可以直接从BROM+SPINOR启动。
乐侠可根据客户需求基于炬迪AD1452提供IC，模组和完整解决方案等多种支持。
AD1452集成了带FPU的Xtensa-HIFI4音频DSP，包括带抽取滤波器的2通道D-MIC接口，带高性能ADC的2通道A-MIC，立体声高性能DAC。它集成了两个I2S/TDM兼容的音频接口，可支持32通道输入和32通道输出。它还集成了8通道的高性能ASRC，THD+N小于-140dB。AD1452是一款无MCU芯片，主MCU通过I2C/SPI从模式接口将DSP代码和配置寄存器加载到AD1452。在ChipSlave模式下，DSP可以根据MCU配置的RAM地址运行，在ChipMaster模式下，DSP可以直接从BROM+SPINOR启动。
乐侠可根据客户需求基于炬迪AD1452提供IC，模组和完整解决方案等多种支持。
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详 细 参 数 |
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System |
Support SPI NOR boot, up to 50MHz.
AVCC support 3.0~3.6V external power supply.
IOVCC support 1.7~3.6V external power supply.
Internal LDO output VDD from AVCC.
Internal 32k&64M RC from AVCC.
Support oscillator inputs: HOSC(24.576MHz).
Supply Audio PLL and DSP PLL, the sources of the PLLs are HOSC or Bclk.
Flexible general purpose 31 IOs.
Timer*2.
Watchdog
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DSP |
VLIW & SIMD Architecture Xtensa-HIFI4 Audio DSP with FPU, up to 294.912MHz.
Support four 32x32-bit MACs or eight 32x16-bit MACs or eight 16x16-bit MACs.
Support 72-bit accumulators.
Provide up to four single-precision IEEE floating point MACs per cycle.
Support fourth VLIW slot and the ability to issue two 64-bit loads per cycle.
Support Vector floating-point precision support for enhanced audio and voice processing.
Support 96KB IRAM and 256KB DRAM, programmable, shareable.
Compatible at the C/C++ source level for the programs optimized using intrinsic.
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DMA |
Support memory-to-memory, memory-to-peripheral, and peripheral-to-memory.
Provide 16-channel ordinary DMA that supports for transmission in burst 8 mode or single mode.
Transmission width includes 8-bit, 16-bit, and 32-bit.
Support separated mode for audio.
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Audio ADC |
Built-in stereo 24bit input sigma-delta ADCs, SNR (A-WEIGHTING): 115dB, THD+N: -93dB.
The input source can be selected from MIC amplifiers and Auxin.
ADC supports sample rate 8k/12k/11.025k/16k/22.05k/24k/32k/44.1k/48k/88.2k/96kHz.
A digital high-pass filter can be used to remove DC offsets, and its cut-off frequency is configured.
There are seven different frequency response curves low-pass filter can be selected for voice, sound or music
application.
Support automatic amplitude limitation.
Support single-ended input analog microphones and stereo full difference input microphones.
Support 2 channels PDM Digital microphones.
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Audio DAC |
Built-in stereo 24bit sigma-delta DAC, SNR (A-WEIGHTING): 120dB, THD+N: -100dB.
DAC supports sample rate 8k/12k/11.025k/16k/22.05k/24k/32k/44.1k/48k/88.2k/96kHz.
Support digital volume of 256 steps with zero cross detection.
Support differential audio output for speaker PA.
Full-scale output voltage. The output voltage is proportional to 1Vrms (Single mode) and 2Vrms (Differential mode).
Support sample counter function.
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| UART |
One on-chip UART Controllers inside.
Support 3.3v and 1.8v.
5-8 Data Bits and LSB first in Transmit and Received.
1-2 Stop Bits.
Even, Odd or No Parity.
Capable of speeds 400bps to 6Mbps to enable connections with Bluetooth and other peripherals.
Support IRQ and DMA mode to transmit data.
RX Baud Rate tolerance≤±2%.
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| SPI |
Support SPI normal mode: Mode 0\1\2\3.
Support standard SPI, Dual SPI, Quad SPI.
Support normal 3 wire mode.
Support IRQ and DMA mode to transmit data.
Support 32 level delay chain, 0.5ns/step.
Master mode and slave mode.
Support 50MHz spi_clk as highest speed.
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| I2C |
Two on-chip I2C controllers inside.
Support 3.3v and 1.8v.
Both master and slave functions support.
Both master and slave supports DMA mode.
Support standard mode (100kbps), fast-speed mode (400kbps), super-fast-speed mode (1Mbps).
Multi-slave capability.
7-bit address mode support.
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I2S |
2 groups of fully functional I2STX.
2 groups of fully functional I2SRX.
Each group fully functional I2S supports 1/2/4/8/16 channels.
Support multiple data lines(2D~8D) or single data line(1D)，Formats: Stardard/L-J/R-J.
Support TDM4/TDM8/TDM16
Support DSP mode (max @ 4channel).
Support PCM Short /Long frame synchronization.
Support master/slave mode.
Support I2S slave mode sampling rate change & channel width change & timeout detection.
Support synchronization or asynchronization LRCLK&BCLK @ master/slave mode.
Data size supports 16/20/24/32-bit.
Sampling rate supports 8k/12k/11.025k/16k/22.05k/24k/32k/44.1k/48k/88.2k/96k/192k/384k (Bclk max @
24.576MHz).
Channel width supports 16 or 32 BCLK cycles.
Bit order supports MSB/LSB.
LRCLK pulse width supports 1/16/32 BCLK width or 50% duty of LRCLK cycle width.
MCLK, BCLK, LRCLK output independent gating.
BCLK phase inversion.
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